Guru Prasad Subas Chandra Mishra

Department Electronics & Telecom. Engineering
Designation Professor
Educational Qualification Ph.D
E-Mail gpscmishra.ece@nitrr.ac.in
Contact Number 9437306597
Areas of Interest

Digital and Analog CMOS circuits, VLSI System Design, Nanoelectronics Devices, Optoelectronics, Hardware design methodologies, FPGA based System Design.

Publications
  1. M. Verma, G. P. Mishra, “TOPcon route with quantum wells in GaInP/Si dual junction cell for efficiency enhancement”, Solar Energy, Vol. 250, pp. 409-417, 2023.
  2. Manish Verma, Guru Prasad Mishra, “Analytical Model of InP QWs for Efficiency Improvement in GaInP/Si Dual Junction Solar Cell”, Physica Status Solidi Applied Research, Vol. 220, pp. 2200500, 2023.
  3. Sidhartha Dash, Saumendra Kumar Mohanty, Guru Prasad Mishra, “Hetero-gate dielectric SiGe/Si tunnel FET: a hydrogen gas sensor with improved sensitivity”, Journal of Computational Electronics, Vol. 22, pp. 219-229, 2023.
  4. Mahesh Vaidya, Alok Naugarhiya, Shrish Verma, Guru Prasad Mishra, “Collector engineered bidirectional insulated gate bipolar transistor with low loss”, IEEE Transactions on Electron Devices, Vol. 69, pp. 1604-1607, 2022.
  5. Manish Verma, Guru Prasad Mishra, “Dual Junction GaInP/GaAs Solar Cell with Enhanced Efficiency Using Type‐A InP Quantum Wells”, Physica status solidi (a), Vol. 219, pp. 2100448, 2022.
  6. Sidhartha Dash, Saumendra Kumar Mohanty, Guru Prasad Mishra, “Segmented Drain Engineered Tunnel Field Effect Transistor for Suppression of Ambipolarity”, Silicon, Vol. 14, pp. 1671–1682, 2022.
  7. Soumya S Mohanty, Sikha Mishra, Meryleen Mohapatra, Guru Prasad Mishra, “Dielectrically modulated hetero channel double gate MOSFET as a label free biosensor”, Transactions on Electrical and Electronic Materials, Vol. 23, pp. 156-163, 2022.
  8. Anju Gedam, Bibhudendra Acharya, Guru Prasad Mishra, “Design of Junction-less Twin Source Nanotube TFET for Improved DC and RF Circuit Applications”, Silicon, Vol. 14, pp. 11263–11278, 2022.
  9. Manish Verma, Guru Prasad Mishra, “Recombination and mobility analysis of voltage preserved type-A InP multiple quantum well GaInP solar cell”, Indian Journal of Physics, Vol. 96, pp. 4119–4130, 2022.
  10. Manish Verma, Guru Prasad Mishra, “Effect of 1-D silver grated electrode on wafer‐based TOPCon c-Si solar cell”, Silicon, Vol. 14, pp. 3439-3448, 2022.
  11. Shwetapadma Panda, Guru Prasad Mishra, Sidhartha Dash, “A single gate SiGe/Si tunnel FET with rectangular HfO2 dielectric pocket to improve Ion/Iamb current ratio” Semiconductor Science and Technology, Vol. 37, pp. 065026, 2022.
  12. Girija Shankar Sahoo, Guru Prasad Mishra, “Analysis of Band Alignment Engineering and Interface Defects on a GaAs/GaSb Heterostructure Solar Cell”, Physica status solidi (a), Vol. 219, pp. 2200063, 2022.
  13. Mitali Rathi, Guru Prasad Mishra, “Improved Switching Current Ratio with Workfuncion Modulated Junctionless FinFET”, Silicon, Vol. 14, pp. 12657–12664, 2022.
  14. Abhishek Ray, Alok Naugarhiya, Guru Prasad Mishra, “Analysis of total ionizing dose response of optimized fin geometry workfunction modulated SOI-FinFET”, Microelectronics Reliability, Vol. 134, pp. 114549, 2022.
  15. Chitikina Neeraj Venkatesh, Guru Prasad Mishra, Biswajit Jena, “Design of Core Gate Silicon Nanotube RADFET with Improved Sensitivity”, ECS Journal of Solid State Science and Technology, Vol. 8, pp. 081002, 2022.
  16. Soumya S. Mohanty, Sikha Mishra, Meryleen Mohapatra & Guru Prasad Mishra, “Hetero Channel Double Gate MOSFET for Label-free Biosensing Application”, Silicon, Vol. 14, pp. 8109–8118, 2022.
  17. Soumya S Mohanty, Sikha Mishra, Meryleen Mohapatra, Guru Prasad Mishra, “Impact of biomolecules position and filling area on the sensitivity of hetero stack gate MOSFET”, Microelectronics Journal, Vol. 126, pp. 105504, 2022.
  18. Sidhartha Dash, Guru Prasad Mishra, “Design and analysis of a double gate SiGe/Si tunnel FET with unique inner-gate engineering”, Semiconductor Science and Technology, Vol. 37, pp. 095027, 2022.
  19. Anju Gedam, Bibhudendra Acharya, Guru Prasad Mishra, “Design of a double cavity nanotube tunnel field-effect transistor-based biosenser”, ECS Journal of Solid State Science and Technology, Vol. 8, pp. 081012, 2022.
  20. S. S Mohanty, S. Mishra, M. Mohapatra, G. P Mishra, “High-Performance Exploration of Buried Channel In0.53Ga0.47/InP Stepped Poly Gate MOSFET Using Asymmetric Underlap Gate Spacer”, IETE Technical Review, Vol. 39, pp. 1372-1382, 2022.
  21. Mahesh Vaidya, Alok Naugarhiya, Shrish Verma, Guru Prasad Mishra, “1.2 kV Stepped Oxide Trench Insulated Gate Bipolar Transistor with Low Loss for Fast Switching Application”, ECS Journal of Solid State Science and Technology, Vol. 11, pp. 111008, 2022.
  22. S. Kesherwani, M. Daga, G. P Mishra, “Design of Sub-40nm FinFET Based Label Free Biosensor”, Silicon, Vol. 14, pp. 12459-12465, 2022.
  23. Mahalaxmi Patil, Anju Gedam, Guru Prasad Mishra, “Performance Assessment of a Cavity on Source Charge Plasma TFET-Based Biosensor”, IEEE Sensors Journal, Vol. 21, pp. 2526 - 2532, 2021.
  24. Anju Gedam, Bibhudendra Acharya, Guru Prasad Mishra, “Junctionless Silicon Nanotube TFET for Improved DC and Radio Frequency Performance”, Silicon, Vol. 13, pp. 167–178, 2021.
  25. Girija Shankar Sahoo, Guru Prasad Mishra, “Use of hetero intrinsic layer in GaAs PIN solar cell to improve the intermediate band performance”, Materials Science and Engineering: B, Vol. 263, pp. 114862, 2021.
  26. G. S Sahoo, S. Routray, K. P Pradhan, G. P Mishra, “Electrical, Optical, and Reliability Analysis of QD-Embedded Kesterite Solar Cell”, IEEE Transactions on Electron Devices, Vol. 68, pp. 5518-5524, 2021.
  27. Sasmita Sahoo, Sidhartha Dash, Soumya Ranjan Routray, Guru Prasad Mishra, “Z‐shaped gate TFET with horizontal pocket for improvement of electrostatic behavior”, International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, Vol. 34, pp. e2808, 2021.
  28. Manish Verma, Guru Prasad Mishra, “Electrical Analysis and Comparison of Ta2O5 Tunneling Oxide with SiO2 in Passivated c-Si Solar Cell”, International Journal of High Speed Electronics and Systems, Vol. 30, pp. 2140002, 2021.
  29. Mitali Daga, Guru Prasad Mishra, “Subthreshold Performance Improvement of Underlapped FinFET Using Workfunction Modulated Dual-metal Gate Technique”, Silicon, Vol. 13, pp. 1541-1548, 2021
  30. Soumya S Mohanty, Sikha Mishra, Meryleen Mohapatra, Guru Prasad Mishra, “Investigation of Structural Parameters Impact on Sensitivity of InP/InGaAs/InP Channel Double Gate MOSFET for Biosensing Application”, International Journal of High Speed Electronics and Systems Vol. 30, pp. 2140004, 2021.
  31. Anju Gedam, Bibhudendra Acharya, Guru Prasad Mishra, “Design and performance assessment of dielectrically modulated nanotube TFET biosensor”, IEEE Sensors Journal, Vol. 21, pp. 16761-16769, 2021.
  32. Mahesh Vaidya, Alok Naugarhiya, Shrish Verma, Guru Prasad Mishra, “A low-loss variable-doped trench-insulated gate bipolar transistor with reduced on-state voltage”, Semiconductor Science and Technology, Vol. 36, pp. 075002, 2021.
  33. S. S. Mohanty, S. Mishra, M. Mohapatra, G. P. Mishra, “High Performance and Reliability Analysis of Implant Free Composite Channel In 0.53 Ga 0.47 As/InAs/In 0.53 Ga 0.47 As Delta-Doped MOSFET”, Iranian Journal of Science and Technology, Transactions of Electrical Engineering, Vol. 45, pp. 425-434, 2021.
  34. Anju Gedam, Bibhudendra Acharya, Guru Prasad Mishra, “An analysis of interface trap charges to improve the reliability of a charge-plasma-based nanotube tunnel FET”, Journal of Computational Electronics, Vol. 20, pp. 1157-1168, 2021.
  35. Soumya S Mohanty, Sikha Mishra, Meryleen Mohapatra, G. P Mishra, “Impact of bio-target location and their fill-in factor on the sensitivity of hetero channel double gate MOSFET label-free biosensor”, Advances in Natural Sciences: Nanoscience and Nanotechnology, Vol. 12, pp. 025012, 2021.
  36. G. P. Nikhil, Chinmay Dimri, P. K. Mohanty, K. P. Pradhan, G. P. Mishra, S. Routray, “Performance Evaluation of 10nm SMG FinFET with Architectural Variation towards DC/RF and Temperature Aspects”, Silicon, Vol. 13, pp. 2933-2941, 2021.
  37. Sasmita Sahoo, Sidhartha Dash, Soumya Ranjan Routray, Guru Prasad Mishra, “A new Z-shaped gate line tunnel FET with improved electrostatic performance”, Iranian Journal of Science and Technology, Transactions of Electrical Engineering, Vol. 45, pp. 1037-1050, 2021.
  38. Manish Verma, Guru Prasad Mishra, “High Electric Field Sensing in Ultrathin SiO₂ and Tunnel Region to Enhance GaInP/Si Dual Junction Solar Cell Performance”, IEEE Sensors Journal, Vol. 22, pp. 1273-1279, 2021.
  39. Sasmita Sahoo, Sidhartha Dash, Soumya Ranjan Routray, Guru Prasad Mishra, “Performance Improvement of Heterojunction Double Gate TFET with Gaussian Doping”, Silicon, Vol. 13, pp. 4275-4283, 2021.
  40. Girija Shankar Sahoo, Guru Prasad Mishra, “Design and modelling of InGaP/GaSb tandem cell with embedded 1D GaAs quantum superlattice”, IET Circuits, Devices & Systems, Vol. 14, pp. 471–476, 2020.
  41. Sidhartha Dash, Guru Prasad Mishra, “An analytical model of the surface-potential-based source-pocket-doped cylindrical-gate tunnel FET with a work-function-modulated metal gate”, Journal of Computational Electronics, Vol. 19, pp. 591–602, 2020.
  42. Mahalaxmi, Bibhudendra Acharya, Guru Prasad Mishra, “Design and Analysis of Dual-Metal-Gate Double-Cavity Charge-Plasma-TFET as a Label Free Biosensor”, IEEE Sensors Journal, Vol. 20, pp. 13969– 13975, 2020.
  43. Soumya S Mohanty, Urmila Bhanja, Guru P Mishra, “An Extensive Simulation Study of Gate Underlap Influence on Device Performance of Surrounding Gate In0.53Ga0. 47As/InP Hetero Field Effect Transistor”, Nanoscience & Nanotechnology-Asia, Vol. 10, pp. 157-165, 2020.
  44. Girija Shankar Sahoo, Guru Prasad Mishra, “Preservation of open circuit voltage in a quantum dot solar cell using GaSb quantum confined superlattice”, Optik, Vol. 212, pp. 164678, 2020.
  45. Mahesh Vaidya, Alok Naugarhiya, Shrish Verma, Guru Prasad Mishra, “Lateral Variation-Doped Insulated Gate Bipolar Transistor for Low On-State Voltage with Low Loss”, IEEE Electron Device Letters, Vol. 41, pp. 888-891, 2020.
  46. Sasmita Sahoo, Sidhartha Dash, Soumya Ranjan Routray, Guru Prasad Mishra, “Impact of drain doping engineering on ambipolar and high-frequency performance of ZHP line-TFET”, Semiconductor Science and Technology, Vol. 35, pp. 065003, 2020.
  47. Manish Verma, Guru Prasad Mishra, “Voltage preserved GaInP Single junction Solar Cell using type-A InP multiple quantum well structure with Enhanced Efficiency”, Optik, Vol. 220, pp. 165113, 2020.
  48. Manish Verma, Guru Prasad Mishra, “An integrated GaInP/Si dual-junction solar cell with enhanced efficiency using TOPCon technology”, Applied Physics A, Vol. 126, pp. 1-13, 2020.
  49. Shivendra Yadav, Anuj Khare, Guru Prasad Mishra, Mohd Aslam, “Linearity/intermodulation distortion analysis of tunneling and thermionic emission mechanisms; design proposal and high frequency investigation”, Semiconductor Science and Technology, Vol. 35, pp. 105021, 2020.
  50. S. Routray, K. P Pradhan, G. P Mishra, “Effect of Nanostructure on Carrier Transport Mechanism of III-Nitride and Kesterite Solar Cells: A Computational Analysis”, IEEE Journal of the Electron Devices Society, Vol. 8, pp. 1154-1161, 2020.
  51. Girija Shankar Sahoo, Guru Prasad Mishra, “Use of InGaAs/GaSb quantum ratchet in pin GaAs Solar cell for Voltage Preservation and Higher Conversion Efficiency”, IEEE Transactions on Electron Devices, Vol. 66, pp. 153-159, 2019.
  52. G. S Sahoo, G. P Mishra, “Efficient use of low-bandgap GaAs/GaSb to convert more than 50% of solar radiation into electrical energy: A Numerical Approach”, Journal of Electronic Materials, Vol. 48, pp. 560-570, 2019.
  53. Sikha Mishra, Urmila Bhanja, Guru Prasad Mishra, “Variation of source gate work function on the performance of dual material gate rectangular recessed channel SOI‐MOSFET”, International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, Vol. 32, pp. e2487, 2019.
  54. S. Sahu, S. Dash, and G. P Mishra, “An accurate drain current model for symmetric dual gate tunnel FET using effective tunneling length”, Nanoscience & Nanotechnology­ Asia, Vol. 9, pp. 85-91, 2019.
  55. Sikha Mishra, Urmila Bhanja, Guru Prasad Mishra, “Impact of structural parameters on DC performance of recessed channel SOI-MOSFET”, International Journal of Nanoparticles, Vol. 11, pp. 140-153, 2019.
  56. Soumya S Mohanty, Urmila Bhanja, G. P. Mishra, “Electrostatic and radio frequency performance investigation of δ-doped In0.53Ga0. 47As/InP stepped poly gate metal oxide semiconductor field effect transistor”, Journal of Micromechanics and Microengineering, Vol. 29, pp. 084001, 2019.
  57. Soumya S Mohanty, Urmila Bhanja, G. P. Mishra, “Impact of Underlap Engineering on Stepped Poly Gate In0.53Ga0.47As/InP Heterostructure Metal Oxide Semiconductor Field Effect Transistor for Better Analog Performance”, Journal of Nanoelectronics and Optoelectronics, Vol. 14, pp. 923-931, 2019.
  58. S. Sahoo, S. Dash, G. P. Mishra, “Impact of Work-Function Modulation and Hetero Gate Engineering on Linearity and RF Performance of Charge Plasma TFET”, International Journal of Nanoscience, https://doi.org/10.1142/S0219581X20400062, 2019.
  59. Sikha Mishra, Urmila Bhanja, Guru Prasad Mishra, “Influence of Structural Parameters on the Behavior of an Asymmetric Linearly Graded Workfunction Trapezoidal Gate SOI MOSFET”, Journal of Electronic Materials, Vol. 48, pp. 6607-6616, 2019.
  60. Biswajit Jena, Sidhartha Dash, Soumya Ranjan Routray, Guru Prasad Mishra, “Inner-Gate-Engineered GAA MOSFET to Enhance the Electrostatic Integrity”, Nano, Vol. 14, pp. 1950128, 2019.
  61. Sikha Mishra, Soumya S Mohanty, Subhashree Bhol, Guru Prasad Mishra, “Grooved-gate silicon-on-nothing (SON) MOSFET: evidence for suppressing SCEs”, Nanomaterials and Energy, Vol. 8, pp. 159-166, 2019.
  62. Girija Shankar Sahoo, Guru Prasad Mishra, “Effect of impact ionization on the performance of quantum ratchet embedded intermediate band solar cell: An extensive simulation study”, Optik, Vol. 199, pp. 163382, 2019.
  63. Sikha Mishra, Urmila Bhanja, Guru Prasad Mishra, “An Analytical Modeling and Performance Analysis of Graded Work Function Gate Recessed Channel SOI-MOSFET”, Nanoscience & Nanotechnology-Asia, Vol. 9, pp. 504-511, 2019.
  64. Biswajit Jena, Sidhartha Dash, Guru Prasad Mishra, “Improved Switching Speed of a CMOS Inverter Using Work-Function Modulation Engineering”, IEEE Transactions on Electron Devices, Vol. 65, pp. 2422-2429, 2018.
  65. Gyan Darshan Das, Guru Prasad Mishra, Sidhartha Dash, “Impact of source-pocket engineering on device performance of dielectric modulated tunnel FET”, Superlattices and Microstructures, Vol. 124, pp. 131-138, 2018.
  66. Biswajit Jena, Sidhartha Dash, Guru Prasad Mishra, “Impact of metal grain work function variability on ferroelectric insulation based GAA MOSFET”, IET Micro & Nano Letters, Vol. 13, pp. 1378-1381, 2018.
  67. G. S Sahoo, G. P Mishra, “Use of ratchet band in a quantum dot embedded intermediate band solar cell to enrich the photo response”, Materials Letters, Vol. 218, pp. 139-141, 2018.
  68. Sidhartha Dash, Annada Shankar Lenka, Biswajit Jena, and Guru Prasad Mishra, “Impact of source pocket doping on RF and linearity performance of a cylindrical gate tunnel FET”, International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, Vol. 31, pp. e2283, 2018.
  69. Subhrasmita Panda, Sidhartha Dash, Guru Prasad Mishra, “Analytical modelling of work-function modulated delta-doped TFET to improve analogue performance”, IET Circuits, Devices & Systems, Vol. 12, pp. 374-381, 2018.
  70. G. S Sahoo, G. P Mishra, “Design and modelling of a SJ infrared solar cell approaching upper limit  of theoretical efficiency”, International  Journal  of Modern Physics B, Vol. 32, pp. 1850014, 2018.
  71. Sidhartha Dash, Girija Shankar Sahoo, and Guru Prasad Mishra, “Current switching ratio optimization using dual pocket doping engineering”, Superlattices and Microstructures, Vol. 113, pp. 791-798, 2018.
  72. Biswajit Jena, Sidhartha Dash, Guru Prasad Mishra, “An insight into the high frequency analysis of work function modulated cylindrical surrounding gate MOSFET”, International Journal of Nanoparticles, Vol. 10, pp. 15-26, 2018.
  73. Annada Shankar Lenka, Sikha Mishra, Satya Ranjan Mishra, Urmila Bhanja, and Guru Prasad Mishra, “An extensive investigation of work function modulated trapezoidal recessed channel MOSFET”, Superlattices and Microstructures, Vol. 111, pp. 878-888, 2017.
  74. S. Dash, and G. P Mishra, “A 2­D analytical model for cylindrical gate tunnel FET (CG­ TFET) based on center potential”, Turkish Journal of Electrical Engineering and Computer Sciences, Vol. 25, pp. 770­782, 2017.
  75. G. S Sahoo, and G. P Mishra, “Effective use of spectrum by an ARC less dual junction solar cell to achieve higher efficiency”, Superlattices and Microstructures, Vol. 101, pp. 794-804, 2017.
  76. B. S Ramakrishna, B. Jena, S. Dash, and G. P Mishra, “Investigation of electrostatic performance for a conical surrounding gate MOSFET with linearly modulated work function”, Superlattices and Microstructures, Vol. 101, pp. 152­159, 2017.
  77. B. Jena, S. Dash, and G. P. Mishra, “Effect of underlap length variation on DC/RF performance of dual material cylindrical MOS”, International Journal of Numerical Modelling Electronic Networks Devices and Fields, Vol. 30, pp. 1­12, 2017.
  78. Vivek Gaurav, Sidhartha Dash, and Guru Prasad Mishra, “Dual delta tunnel FET: An energy efficient switch with improved current switching ratio and steeper”, Superlattices and Microstructures, Vol. 107, pp. 219-227, 2017.
  79. J. P Dutta, P. P Nayak, and G. P Mishra, “ Design and evaluation of ARC less InGaP/GaAs DJ solar cell with InGaP tunnel junction and optimized”, Optik-International Journal for Light and Electron Optics, Vol. 127, pp. 4156-4161, 2016.
  80. Biswajit Jena, Sidhartha Dash, and Guru Prasad Mishra, “Electrostatic performance improvement of dual material cylindrical gate MOSFET using work-function modulation technique”, Superlattices and Microstructures, Vol. 97, pp. 212-220, 2016.
  81. S. Panda, S. Dash, S. K Behera, and G. P Mishra, “Delta doped tunnel FET (DTFET) to improve current ratio (ION/IOFF) and ON current performance”, Journal of Computational Electronics, Vol. 15, pp. 857-864, 2016.
  82. M. Singh, S. Mishra, S. S Mohanty, G. P Mishra, “Performance analysis of SOI MOSFET with rectangular recessed channel”, Advances in Natural Sciences: Nanoscience and Nanotechnology , Vol. 7, pp. 015010-1-10, 2016
  83. G. S Sahoo, and G. P Mishra, “Design and modeling of an efficient metamorphic dual-junction InGaP/GaAs solar cell”, Optical and Quantum Electronics, Vol. 48, pp. 420, 2016.
  84.  Sidhartha Dash, Biswajit Jena, and Guru Prasad Mishra, “A new analytical drain current model of cylindrical gate silicon tunnel FET with source δ-doping”, Superlattices and Microstructures, Vol. 97, pp. 231-241, 2016.
  85. S. Dash, and G. P Mishra, “An extensive electrostatic analysis of dual material gate all around tunnel FET (DMGAA-TFET)”, Advances in Natural Sciences: Nanoscience and Nanotechnology, Vol. 7, pp. 025012-1-10, 2016.
  86. G. S Sahoo, P. P Nayak, and G. P Mishra, “An ARC less InGaP/GaAs DJ solar cell with hetero tunnel junction”, Superlattices and Microstructures, Vol. 95, pp. 115-127, 2016.
  87. Subhrasmita Panda, Sidhartha Dash, and Guru Prasad Mishra, “Extensive electrostatic investigation of work function-modulated SOI tunnel FETs”, Journal of Computational Electronics, Vol. 15, pp. 1326-1333, 2016.
  88. B Jena, B. S Ramkrishna, S. Dash, G. P Mishra, “Conical surrounding gate MOSFET: a possibility in gate-all-around family”, Advances in Natural Sciences: Nanoscience and Nanotechnology, Vol. 07, pp. 015009-1-6, 2016.
  89. Sidhartha Dash, Girija Shankar Sahoo, Guru Prasad Mishra, “Subthreshold swing minimization of cylindrical tunnel FET using binary metal alloy gate”, Superlattices and Microstructures, Vol. 91, pp. 105-111, 2016.
  90. P. Kumari, S. Dash, G. P Mishra, “Impact of technology scaling on analog and RF performance of SOI–TFET”, Advances in Natural Sciences: Nanoscience and Nanotechnology, Vol. 6, pp. 045005, 2015.
  91. S. Dash, G. P Mishra, “A new analytical threshold voltage model of cylindrical gate tunnel FET (CG-TFET)”, Superlattices and Microstructures, Vol. 86, pp. 211-220, 2015.
  92. P. P Nayak, J. P Dutta, G. P Mishra, “Efficient InGaP/GaAs DJ solar cell with double back surface field layer”, Engineering Science and Technology, an International Journal, Vol. 18, pp. 325-335, 2015.
  93. B. Jena, K. P Pradhan, S. Dash, G. P Mishra, P. K Sahu, S. K Mohapatra, “Performance analysis of undoped cylindrical gate all around (GAA) MOSFET at subthreshold regime”, Advances in Natural Sciences: Nanoscience and Nanotechnology, Vol. 6, pp. 035010, 2015.
  94. S. Dash, G. P Mishra, “A 2D analytical cylindrical gate tunnel FET (CG-TFET) model: impact of shortest tunneling distance”, Advances in Natural Sciences: Nanoscience and Nanotechnology, Vol. 6, pp. 035005, 2015.
  95. Biswajit Jena, Kumar Prasannajit Pradhan, Prasanna Kumar Sahu, Sidharth Dash, Guru Prasad Mishra, Sushanta Kumar Mohapatra, “Investigation on cylindrical gate all around (GAA) to nanowire MOSFET for circuit application”, Facta Universitatis, Series: Electronics and Energetics, Vol. 28, pp. 637-643, 2015
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