Dr. Alok  Naugarhiya

Department Electronics & Telecom. Engineering
Designation Assistant Professor
Educational Qualification BE (EC), M.Tech (Microelectronics and VLSI Design), Ph.D. (ECE)
E-Mail anaugarhiya.etc@nitrr.ac.in
Contact Number 8989828339
Areas of Interest

VLSI design, semiconductor device modeling, analysis of superjunction power MOSFET, high-k devices, silicon carbide use in high power devices and strain effect on semiconductor power devices.

Publications

SCI Journals

1.  A. Naugarhiya, P.N. Kondekar, \"High Permittivity Material Selection for Design of Optimum Hk VDMOS\", Superlattices and Microstructures, vol. 83, pp. 310 - 321, July 2015, Elsevier.

2.  A. Naugarhiya, Shashank Dubey and P.N. Kondekar, \"Novel Strained Superjunction VDMOS\" Superlattices and Microstructures, vol. 85, pp. 461- 468, Sep 2015, Elsevier.

3. Alok Naugarhiya, Pankaj Wakhradkar,Pravin N. Kondekar, Ganesh C. Patil, Rajendra M. Patrikar \"Analytical model for 4H-SiC superjunction drift layer with anisotropic properties for ultrahigh-voltage applications\" J Comput Electron, vol. 16, pp. 190–201, 2017, © Springer Science+Business Media New York 2017.

Conference Proceeding

1.  A.Naugarhiya and P. N. Kondekar, “Electrical characteristics comparison between process and device structures of super junction vdmos,” in CARE, Dec 2013, Jabalpur, India.

2.  Naugarhiya and P. N. Kondekar, “Optimized process design flow for fabrication of superjunction vdmos for enhanced RDSonA,” in 11th ISETC, Nov 2014, Timisoara, Romania, Europe

3.  P. N. Kondekar and A. Naugarhiya, “Ac and transient analysis of sj vdmos,” in 11th ISETC, Nov 2014, Timisoara, Romania, Europe

4.  P.Wakhradkar, A. Naugarhiya, and P. N. Kondekar, “Analysis of anisotropic 4h-sic sj drift layer,” in EESCO, Jan 2015, Visakhapatnam, India.

5. J. Rusia, S. Majumdar, A. Naugarhiya, B. Acharya, S. Majumder, S. Verma “Remote Temperature & Humidity sensing through ASK Modulation Technique”, International Conference on ICT in Business Industry Government (ICTBIG 2016).

6. J. Rusia, S. Majumdar, A. Naugarhiya, B. Acharya, S. Majumder, S. Verma  “RF Based Wireless Data Transmission between Two FPGAs”, International Conference on ICT in Business Industry Government (ICTBIG 2016).

7. A. Chaudhary, J. Rusia, K. Gourav, P. Tripathi, J. Pandey, S. Majumdar, A. Naugarhiya, B. Acharya, S. Majumder, S. Verma, “Design and Simulation of Physical Layer Blocks of ZigBee Transmitter”, International conference on IoT in Social, Mobile, Analytics and Cloud (I-SMAC 2017). 

8. A. Sharma, S. Majumdar, A. Naugarhiya, B. Acharya, S. Majumder, S. Verma, “VERILOG based simulation of ASK, FSK, PSK, QPSK digital modulation techniques”, International conference on IoT in Social, Mobile, Analytics and Cloud (I-SMAC 2017).

9. A. Chakradhari, S. Tamrakar, R. Basant, M. Vaidya, S. Majumdar, A. Naugarhiya, B. Acharya, S. Majumder and S. Verma “Slotted CSMA/CA Simulation in Verilog”, International Workshop on Internet of Things and TV White Spaces (WIOT’ 2017).

Other Info.