Dr. Alok  Naugarhiya

Department Electronics & Telecom. Engineering
Designation Assistant Professor
Educational Qualification BE (EC), M.Tech (Microelectronics and VLSI Design), Ph.D. (ECE)
E-Mail anaugarhiya.etc@nitrr.ac.in
Contact Number 8989828339
Areas of Interest

VLSI design, semiconductor device modeling, analysis of superjunction power MOSFET, high-k devices, silicon carbide use in high power devices and strain effect on semiconductor power devices.

Publications

SCI Journals

  1. A. Naugarhiya, P.N. Kondekar, "High Permittivity Material Selection for Design of Optimum Hk VDMOS", Superlattices and Microstructures, vol. 83, pp. 310 - 321, July 2015, Elsevier.

  2. A. Naugarhiya, Shashank Dubey and P.N. Kondekar, "Novel Strained Superjunction VDMOS" Superlattices and Microstructures, vol. 85, pp. 461- 468, Sep 2015, Elsevier.

  3. Alok Naugarhiya, Pankaj Wakhradkar,Pravin N. Kondekar, Ganesh C. Patil, Rajendra M. Patrikar "Analytical model for 4H-SiC superjunction drift layer with anisotropic properties for ultrahigh-voltage applications" J Comput Electron, vol. 16, pp. 190–201, 2017, © Springer Science+Business Media New York 2017.

  4. Payal Nautiyal, Alok Naugarhiya, Shrish Verma, "Application of workfunction engineering in vertical superjunction devices", Elsevier Superlattices and Microstructures, 2017, DOI https://doi.org/10.1016/j.spmi.2017.06.024.

  5. Onika Parmar, Alok Naugarhiya “Incorporation of hafnium and platinum metal in vertical power MOSFETs” Journal of Computational Electronics Vol.17, No. 3, September 2018.

  6. Payal Nautiyal, Alok Naugarhiya, Shrish Verma, “Strained superjunction U-MOSFET with insulating layer between alternate pillars”,  Materials Research Express, Vol. 6, No. 4, January 2019.

International Publications

1. Alok Naugarhiya, "A Novel Charge-Protection Superjunction-Insulator VDMOS", International Journal of Electronics and Electrical Engineering Vol. 5, No. 3, June 2017.

Conference Proceeding

  1. S. Hafizullah, Mahesh Vaidya, Shrish Verma, Alok Naugarhiya, "An Efficient Hardware Architecture for Route Discovery in AODV for a Sensor Node ", 9th Information Technology, Electromechanical and Microelectronics Conference (IEMECON), 2019, organised by UEM Jaipur.(Accepted)

  2. Prashant Kumar Kushwaha, Payal Nautiyal, Anshul Gupta, Alok Naugarhiya, Shrish Verma, “An Improved SJ UMOS with Modified Gate Electrode to Reduce Gate Charge”, 9th Information Technology, Electromechanical and Microelectronics Conference (IEMECON), 2019, organised by UEM Jaipur.(Accepted)

  3. Abhishek Ray, Vicky Butram, Namrata Gupta, Alok Naugarhiya, "Non-Conventional Cantilever for Piezoelectric Energy Harvesting at Ultra Low Resonant Frequency" 9th Information Technology, Electromechanical and Microelectronics Conference (IEMECON), 2019, organised by UEM Jaipur.(Accepted)

  4. Shaik Hafizullah, M. S. S. V Srikrishna Manideep, Vinay Sharma, PallabKumar Nath, Alok Naugarhiya, Shrish Verma, “An Efficient Hardware Implementation of Walsh Hadamard Transform for JPEG XR”, 15th Edition of the IEEE India Council International Conference (INDICON), 2018, organised by Amrita Vishwa Vidyapeetham, Coimbatore.

  5. Namrata Gupta,  Abhishek Ray,  Alok Naugarhiya, Abhinav Gupta "Design and Optimization of MEMS Piezoelectric Cantilever for Vibration Energy Harvesting Application", in VCAS-2018 organised by MNNIT Allahabad.

  6. Vicky Batrum, Alok Naugarhiya, “Non traditional proof mass arrangement in cantilever based pizeoelectric energy harvester” in ICCCS 2018 organized at Katmandu Nepal.

  7. Onika Parmar and  Alok Naugarhiya, “Application of workfunction  engineering in lateral power devices” in International Conference on Advacnces in Electronics Computers and Communication (ICAECC 2018) organized by, REVA University, Bangalore, India.

  8. M Vaidya, A. Naugarhiya, S. Verma, “High Speed Generic Voltage Level Shifter” Second International Conference on Electronics, Computers and Communications (ICAECC-2018), REVA University, Bangalore, India.

  9. P. Nautiyal, A. Naugarhiya, S. Verma, “Charge Plasma Based VVD-SJ VDMOS Employing Reversed Doping Concentration” Second International Conference on Electronics, Computers and Communications (ICAECC-2018), REVA University, Bangalore, India.

  10. P. Nautiyal, O. Parmar A. Naugarhiya, S. Verma, “Design and Performance Projection of Workfunction Engineered Variable Vertical Doped Superjuction Vertical Single Diffused MOS” International Conference on Electronics, Computing and Communication Technologies (IEEE CONECCT 2018), Bangalore, India.

  11. Ankush Chunn, A. Naugarhiya, “Use of Open Source CAD Tools in VLSI Design Curriculum for Developing Countries” International Conference on Computing, Engineering and Information Technology (ICCEIT 2018) ,Bangkok, Thailand.

  12. R. Shrivastav, S. Ranjan, P.K. Nath, M. Vaidya, A. Naugariya, B. Acharya, S. Majumder  and S. Verma, “High Speed Low Area VLSI Architecture of Slotted CSMA-CA for Wireless Sensor Network and IoTs” International Conference on Innovative Technology in Engineering(ICITE2018), Osmania, Hyderabad, India(Accepted).

  13. J. Rusia, S. Majumdar, A. Naugarhiya, B. Acharya, S. Majumder, S. Verma “Remote Temperature & Humidity sensing through ASK Modulation Technique”, International Conference on ICT in Business Industry Government (ICTBIG 2016).

  14. J. Rusia, S. Majumdar, A. Naugarhiya, B. Acharya, S. Majumder, S. Verma  “RF Based Wireless Data Transmission between Two FPGAs”, International Conference on ICT in Business Industry Government (ICTBIG 2016).

  15. A. Chaudhary, J. Rusia, K. Gourav, P. Tripathi, J. Pandey, S. Majumdar, A. Naugarhiya, B. Acharya, S. Majumder, S. Verma, “Design and Simulation of Physical Layer Blocks of ZigBee Transmitter”, International conference on IoT in Social, Mobile, Analytics and Cloud (I-SMAC 2017). 

  16. A. Sharma, S. Majumdar, A. Naugarhiya, B. Acharya, S. Majumder, S. Verma, “VERILOG based simulation of ASK, FSK, PSK, QPSK digital modulation techniques”, International conference on IoT in Social, Mobile, Analytics and Cloud (I-SMAC 2017).

  17. A. Chakradhari, S. Tamrakar, R. Basant, M. Vaidya, S. Majumdar, A. Naugarhiya, B. Acharya, S. Majumder and S. Verma “Slotted CSMA/CA Simulation in Verilog”, International Workshop on Internet of Things and TV White Spaces (WIOT’ 2017).

  18. P.Wakhradkar, A. Naugarhiya, and P. N. Kondekar, “Analysis of anisotropic 4h-sic sj drift layer,” in EESCO, Jan 2015, Visakhapatnam, India.

  19. P. N. Kondekar and A. Naugarhiya, “Ac and transient analysis of sj vdmos,” in 11th ISETC, Nov 2014, Timisoara, Romania, Europe.

  20. A. Naugarhiya and P. N. Kondekar, “Optimized process design flow for fabrication of superjunction vdmos for enhanced RDSonA,” in 11th ISETC, Nov 2014, Timisoara, Romania, Europe.

  21. A.Naugarhiya and P. N. Kondekar, “Electrical characteristics comparison between process and device structures of super junction VDMOS,” in CARE, Dec 2013, Jabalpur, India.

Other Info.

1. Ph.D Thesis Supervision (Currently at NIT Raipur)

 

S. No.

Name

Area of Interest

Name of other supervisor (If any)

Status

1

Onika Parmar

Vertical power devices

 

Ongoing

2

Payal Nautiyal (Joint-Supervisor)

Superjunction power devices

Prof. (Dr) Shrish Verma

Ongoing

3

Vicky Butram

MEMS

 

Ongoing

4

Namarta Gupta

Bipolar power devices

 

Ongoing

5

Mahesh Vaidaya (Joint-Supervisor)

Insulated-gate bipolar transistor modeling

Prof. (Dr) Shrish Verma

Ongoing

6

Sanjeev Ranjan (Supervisor)

Radiation hardening of power devices

Dr. Saikat Majumder

Ongoing

2. M.Tech Thesis Supervision (Currently At NIT Raipur)

S.No.

Name

Area of Interest

Name of other supervisor (If any)

Status

1.

Abhishek Ray

MEMS

 

Ongoing

2

ShaikHafizullaha (Joint-Supervisor)

Digital VLSI Design

Prof. (Dr) Shrish Verma

Ongoing

3.

Ajeet Singh Lowanshi (Joint-Supervisor)

Vertical Power Devices

Dr. Anshul Gupta

Ongoing

4.

Prashant Kumar Kushwaha (Joint-Supervisor)

Vertical Power Devices

Dr. Anshul Gupta

Ongoing

3. B. Tech Project Supervised

S.No

Title of Project

Name of the student

Name of other supervisor (If any)

1

Design and simulation of physical layer blocks of zigbee transmitter using verilog

Janam Pandey Kumar Gaurav Parul Tripathi

Prof. (Dr) Shrish Verma

2

Implementation of zigbee MAC layer CSMA-CA algorithm

Shreyash Tamrakar Rashmi Basant Vivek K. Singh Prakhar Goyal

Prof. (Dr) Shrish Verma

3

Wireless temperature & humidity monitoring system through ASK modulation technique

Nilay Markam Sachin Paikera Prassana Kumar

Prof. (Dr) Shrish Verma

4

Design and simulation of secured Transmitter for WSN

Akshay Sharma Amit Chakradhari Aaditya Chaudhary Jaydeep Rusia

Dr. Shubhankar Majumdar

5

Impact of technology on the power amplifier performance

Chandan Kumar

Dr. Shubhankar Majumdar

6

Thermal analysis of LSDMOS

Jagriti Sahu Neha Choudhary Sonalie Ahirwar

-

7

Application of workfunction engineering on strained superjunction vertical MOSFET

Prateek Baghel

Dr. Ankush Chunn

8

Design and simulation of AES encryption/decryption algorithm in verilog

Dudekula Sadik Basha Janugani Thanuj Kumar

-

9

An efficient hardware implementation of Walsh Hadamard transform for Jepg-XR Image compression

Vinay Sharma M. Srikrishna Maindeep

Dr. Pallab Kumar Nath

4. Foreign Visits:

  • Timisoara, Romania, Europe for attending 11th ISETC at Politehnica University of Timisoara, Nov 2014.

  • Singapore for attending ACM's Int. Conf. on Graphics and Signal Processing at NTU, June 2017.

  • Hongkong for attending 25th International Conference on “Engineering & Technology, Computer, Basic & Applied Sciences” (ECBA- 2017). July 2017.

  • Bangkok, Thailand for attending 8th Int. Conf. on Computing, Engg. & IT (ICCEIT), March 2018

  • Kathmandu, Nepal for attending 3rd IEEE International Conference on Computing, Communication and Security at Institute of Engineering Tribhuvan University, October 2018. 

5. Professional Membership: 

IEEE, IEI, IETE

6. Organization of Courses/Conferences

 
S.No. Name of the STTP Sponsored by Date
1

VLISD-SoC and Micronano Technologies

TEQIP - II 26-30/Sep/2016

7. Expert Talk/Key Note Speaker/ Session Chair:

  • Expert talk on “Recent Trends in VLSI Design” at Hitkarini College of Engineering and Technology on 01/09/2016.

  • Talk on the topic “How to write a research Paper” on 22nd Dec 2016 at R.S.R Rungta College of Engineering and Technology.

  • Expert talk at Hitkarini College of Engineering and Technology from 26th to 28th Dec 2016.

  • Session Chair in International Conference on Innovations & Sustainable Development from 25th -26th March, 2017.

  • Key Note Speaker at AICON, 2016 organized by Electronics & Telecommunication Department of Chhatrapati Shivaji Institute of Technology.

  • Delivered Lecture in STTP organized by Department  of IT, NIT Raipur on “Logic Building using C and MATLAB”  at NIT Raipur in 2016.

  • Delivered Lecture in STTP organized by Department of Electrical Engineering NIT Raipur, on “Optimization Techniques and their implementation using MATLAB”  at NIT Raipur in 2016.

  • Key Note Speaker at AICON, 2017 organized by Electronics & Telecommunication Department of Chhatrapati Shivaji Institute of Technology.

  • Expert Lecture at Smart Electronic Systems & IoT for Smart City 2017 organized at MNIT Jaipur.

  • Expert talk on “Vertical Power MOSFET’s” on 8th -9th Sept. 2017 at G.B. Pant Institute of Engineering and Technology, PAURI Garhwal.

8. Participated in Workshop

  • Participated in TEQIP II sponsored “Faculty Induction Programme” at NIT Raipur in Sept. 2016

  • Attended IEP at IIT Roorkee organized under SMDP C2SD project, MeitY, Govt. of India.

9. Academic Responsibility:

  • Design syllabus of M.Tech in “VLSI and Embedded System” at ETC, NIT Raipur.

  • Set up the Lab of VLSI & Microelectronics and is the lab in-charge from 2015 till date. 

10. Courses Taught:

  • Digital Logic Design

  • VLSI and Microelectronics

  • Semiconductor Devices

  • Analog IC Design